Cara mengembangkan sirkuit mikro Anda sendiri. Saya menanyakan pertanyaan ini ketika saya ingin membuat prosesor saya sendiri. Saya pergi ke google dan tidak menemukan sesuatu yang baik. Jawabannya kebanyakan dua։ "Anda tidak akan membuat prosesor Anda sendiri, karena itu terlalu sulit" dan "Memalu dan merakit komputer dari komponen."
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։ . 10000 , . Multi project wafer service [ https://en.wikipedia.org/wiki/Multi-project_wafer_service ].
GDS-II . , , .
GDS-II Process Development Kit
SHA3. SHA3 , Caravel Harness. SKY130 . Caravel Harness .
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SPICE.
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Design Rule Check
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Primitive Extraction rules . GDS-II (netlist). netlist , netlist .
Layout versus Schematic check , GDS-II netlist. , .
Standard Cell Library. , . .
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- - MOSFET. - NMOS PMOS.
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։ PMOS () NMOS ()
. Ubuntu ։ https://github.com/efabless/openlane#quick-start. ~/openlane_exp/
։ https://github.com/armleo/sky130_ubuntu_setup/blob/main/install_tools.sh
https://inst.eecs.berkeley.edu/~cs250/fa20/labs/lab1/
OpenLANE, . . skywater PDK + . .
Yosys. . ։ Claire Wolf. Verilog gate-level , . Design Compiler Synopsys
, gate-level GDS-II.
skywater-pdk. PDK skywater 130nm. , -
ngspice, spice. , HSPICE Synopsys.
xschem, . CustomCompiler Synopsys
klayout, GDS-II. CustomCompiler Synopsys
Magic, DRC, . . IC Validator Synopsys
Netgen, LVS . IC Validator Synopsys
OpenRAM. . Memory Compiler Synopsys. , - NDA. .
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cd ~/openlane_exp/openlane
docker run -it --rm -v /home/armleo/openlane_exp/openlane:/openLANE_flow \
-v /home/armleo/openlane_exp/openlane/pdks:/home/armleo/openlane_exp/openlane/pdks \
-e PDK_ROOT=/home/armleo/openlane_exp/openlane/pdks \
-e PDKPATH=/home/armleo/openlane_exp/openlane/pdks/sky130A/libs.tech/magic \
-v /tmp/.X11-unix:/tmp/.X11-unix \
-v /home/armleo/openlane_exp:/home/armleo/openlane_exp \
-e DISPLAY=unix$DISPLAY \
-u 1000:1001 efabless/openlane:v0.12
klayout /home/armleo/openlane_exp/openlane/pdks/skywater-pdk/libraries/sky130_fd_sc_hd/latest/cells/inv/sky130_fd_sc_hd__inv_1.gd
X11 .
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Manage Technologies
/home/armleo/openlane_exp/openlane/pdks/sky130A/libs.tech/klayout/sky130A.lyt
sky130A
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, ։D.
, . SOURCE BULK PMOS VDD . VGND , SOURCE BULK NMOS .
GATE A LI1.
Y LI1.
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NMOS , , PMOS . . NMOS , , , PMOS .
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, 4 ։ DRAIN, SOURCE, GATE, BULK.
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(NAND, NOR), LVS, DRC, PEX .
, (Sequential components) - Latch, Flip-flop
Setelah itu, kami akan menganalisis cara mengkompilasi Verilog kami di GDS.
Mari kita pahami cara merakit skema kita di Caravel